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Intel’s 18A and TSMC’s N2 process nodes compared: Intel is faster, but TSMC is denser
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AMD’s Zen 6-based desktop processors may feature up to 24 cores
“TSMC has been a key partner for many years, and our deep collaboration with their R&D and manufacturing teams has enabled AMD to consistently deliver leadership products that push the limits of high-performance computing,” said Dr. Lisa Su, chief executive of AMD. “Being a lead HPC customer for TSMC’s N2 process and for TSMC Arizona Fab 21 are great examples of how we are working closely together to drive innovation and deliver the advanced technologies that will power the future of computing.”
TSMC’s N2 is the foundry’s first process technology that relies on gate-all-around (GAA) nanosheet transistors. The company expects its manufacturing technology to offer either a 24% to 35% reduction in power consumption or a 15% increase in performance at constant voltage, along with a 1.15X boost in transistor density compared to the previous N3 (3nm-class) generation. These gains are primarily driven by the new type of transistors and the N2 NanoFlex design-technology co-optimization framework.
AMD’s announcement comes after its arch-rival Intel delayed the release of its next-generation Xeon ‘Clearwater Forest’ processor made on its 18A manufacturing technology (which is set to rival TSMC’s N2) to the first half of next year.
Separately, AMD announced that it has successfully validated the silicon of its 5th Generation EPYC processor produced by TSMC at its Fab 21 facility near Phoenix, Arizona. As a result, some of the company’s current-generation EPYC CPUs can now be produced in the U.S.
“We are proud to have AMD be a lead HPC customer for our advanced 2nm (N2) process technology and TSMC Arizona fab,” said Dr. C.C. Wei, chief executive and chairman of TSMC. “By working together, we are driving significant technology scaling resulting in better performance, power efficiency and yields for high-performance silicon. We look forward to continuing to work closely with AMD to enable the next era of computing.”