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“Intel’den Yeni 18A-PT Varyantı: 3D Die Stacking ve 14A Proses Düğümü için Güncellenmiş Foundry Yol Haritası”

lot’ through its Arizona fab, indicating it will soon begin production there as well.

The 18A node is the first in the industry to be productized with both a PowerVia backside power delivery network (BSPDN) and RibbonFET gate-all-around (GAA) transistors. PowerVia provides optimized power routing on the back of the chip to improve performance and transistor density. RibbonFET also offers better transistor density, along with faster transistor switching, in a smaller area through the use of four vertical nanosheets surrounded entirely by the gate.

The 18A node enters HVM in roughly the same timeframe as TSMC’s competing 2nm N2 node. However, TSMC’s N2 node does not come with a backside power delivery network, but it does have GAA technology with three vertical nanosheets. There have been some basic comparisons between the process nodes made based on presentations at a recent industry event. The general takeaway is that Intel’s node is faster and lower-power than TSMC’s, though TSMC retains the edge in density (and presumably cost). However, these distinctions could vary depending on the specific implementation in different chip designs.

Intel divulged today that it has wafers of its high-performance 18A-P node in the fab. This 18A variant features an optimized power and frequency curve, providing an 8% improvement in performance per watt. This can be leveraged as either higher clock speeds or lower power consumption at the same performance, depending upon chip-specific tuning.

The 18A-P node is design rule-compatible with the 18A node, easing the design process for customers. Intel is already collaborating with Electronic Design Automation (EDA) software vendors to enable broad support for industry-standard design tools, and it is also working with Intellectual Property (IP) designers to provide the necessary IP blocks, thereby simplifying implementation.

Mature Nodes: 16nm and 12nm continue advancing

Mature Nodes: 16nm and 12nm continue advancing

Intel Foundry not only addresses the leading edge of technology, but it is also working on several mature nodes. Intel’s 16nm node, which is essentially a version of its 22FFL node that leverages industry standard design tools and PDKs, has a tapeout in the fab now.

Intel is also continuing its work with partner UMC to develop a 12nm node that will be produced in three of Intel’s Arizona fabs beginning in 2027. In fact, Intel is currently engaging lead customer for this node. 12nm will be used primarily for mobile communication infrastructure and networking applications.

Takeaways, for now

Takeaways, for now

Intel canceled high volume manufacturing of the 20A node as a cost-cutting measure, but the company is now on the cusp of of production with with its18A node, marking a critical milestone as it looks to regain the manufacturing lead over TSMC. The addition of new line extensions, with the die-stacking-capable 18A-PT being a particularly strong advance, will help the company to further broaden its appeal to potential foundry customers.

The development of the company’s 14A node is also well underway, signifying that the company is on track to providing a steady cadence of new nodes and features to the roadmap. We haven’t yet heard any new details about Intel’s plans for its 10A (1nm-class) process node yet, which is expected to begin development in 2027. Intel’s press release also doesn’t mention any new progress on its Intel 3 node, but we expect more details to emerge throughout the day.

Intel’s event is focused heavily on displaying its broad portfolio of EDA, IP, and services driven by an ecosystem of indsutry stalwarts, like Synopsys and Cadence. The new Intel Foundry Chiplet Alliance is also an important development that will enable customers to mix-and-match chiplets into their design based upon interoperable and validated designs.

Intel’s advanced packaging services are also of particular importance as they provide the fastest on-ramp to meaningful revenue generation. Intel did mention that it will make its 3D stacking Foveros implementation available to foundry customers, and noted a new partnership with Amkor. However, details are slight for now. We’ll update this article as more information becomes available.

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